Article Details


Review of Network on Chip Architectures

[ Vol. 10 , Issue. 1 ]

Author(s):

Muhammad Athar Javed Sethi, Fawnizu Azmadi Hussin and Nor Hisham Hamid   Pages 4 - 29 ( 26 )

Abstract:


Background: Network on Chip (NoC) is a communication mechanism to provide scalable, modular, robust and high-performance communication for the on-chip network.

Switching Techniques: NoC brings the concept of packet switching from data to on-chip networks. The nodes are connected through point to point links using regular and irregular topologies. The packet traverses along these nodes to reach the destination using routing algorithm.

Conclusion: In this paper, NoC architectures are reviewed using different parameters, detail information is also provided for these parameters. The NoC architectures reviewed are proposed and implemented in last more than a decade.

Keywords:

Network on Chip (NoC), link sharing, quality of service (QoS), fault-tolerant routing algorithms, switching techniques, buffer management.

Affiliation:

Department of Computer Systems Engineering, University of Engineering and Technology, Peshawar, Department of Electrical & Electronic Engineering, Universiti Teknologi PETRONAS, Tronoh, Perak, Department of Electrical & Electronic Engineering, Universiti Teknologi PETRONAS, Tronoh, Perak

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